Running one display block with pixel 0,0 turned off
I have finally managed to get a dot matrix display running full bore without resorting to outrageous voltages such as 18V on 5V logic. I have been working towards this moment for probably 2 or 3 years now.
This uses a pinned version of the hardware described in previous posts and more or less proves that it will work with that hardware with few modifications. The only major difference is that I am not using the same chip for the LED current sink. In the picture on the right it is running at an input voltage of 6.37V@325mA which is regulated down to 5.26V and 4.78V.
One major deviation from the hardware mentioned previously is that the row decoder is running at a slightly higher voltage than the rest of the circuit (5.26V). This is to remedy a problem I noticed with the MOSFETs in which their gates are not fully turned on unless the gate voltage is above the drain voltage. What I ended up doing was running a 5.1V zener off of the input from my power supply to create a higher voltage than the 7805 supplies to the rest of the circuit (including the MOSFETs). This is marvelously ineffecient and seems to be causing the 7805 to heat up, but that also might be from the problem that I will go over next.
The other major deviation is how I am running the column sink driver. I ordered one that I thought was almost the exact same as the one I planned to use on the PCB, but doesn’t behave like the datasheet says it should. I ended up having to take away the external resistor and replace it with a direct short to ground. This effectively removed the current cap and now the chip is drawing 120mA by itself (which is bad). In contrast, the chip draws 20mA with a 300Ω resistor, but half of the rows get turned off. This in itself makes no sense since this is the column sink and for something like this to happen it would have to have something to do with the row drivers (i.e. the MOSFETs and accompanying logic), but it consistently shows up when I put a resistor on the resistor pin of the column sink chip. However, if a row starts flickering irregularly all I have to do is increase the input voltage a bit and it goes away. Any ideas as to why this would happen are appreciated (leave a comment).
From a coding standpoint I think I grossly overestimated how hard it would be to strobe this display. The chip is running at 12MIPS and so far is able to render an entire 40×16 buffer at 30fps with a ton of idle time. I have not yet implemented the grayscale dimming functionality, but even that won’t add much to the overhead. Looking at my scope I can see that out of the 584uS between rows only ~290uS is actually used for writing to the column sink and switching which row is turned on. This means that my “processor usage” slightly less than 50%. I was expecting it to be significantly more, but now I see that implementing the 8-bit parallel bus which will be the link between this and the “computer” board will be easier than I’d hoped.
Wow, that does sound odd.
Problems caused by a chip acting differently than what I think the datasheet says are annoying.
I am almost certain that driving the gate to a mere 0.26 V above +5.0 V is not turning your high-side nFETs completely on.
Most (all?) nFETs need Vgs_on over 3 V to completely turn on.
The other end of the nFET (the end we are *trying* to pull up to turn on the LEDs) is pulled up to, at most, the Vgs_threshold voltage below the gate voltage.
(oversimplifying:) If your Vgs_threshold is 3 V, and your gate voltage is 5.26 V, then the output is a mere 2.26 V above ground — perhaps that’s why shorting out the column driver resistor seemed to help.
I don’t like running digital logic chips off nonstandard power voltage.
But if we give the row driver digital logic its standard power voltage, how do we turn the MOSFETs completely on?
There are at least 2 ways:
(a) Replace all the hi-side nFET with hi-side pFET. Turning on high-side pFETs by pulling the gate a few volts *down* from +5V, is much simpler than turning on nFETs by pushing the gate a few volts *up* above +5V.
Or,
(b) Use some sort of “level translator” “high-side driver” between the row driver digital logic and the high-side nFETs.
The level translator converts the 0 V to 5 V output of the row driver
to the ~1 V or less to turn the nFET hard off, and a “Vpp” high voltage of “5V + Vgs_on” or more (8 V or more?) to turn that nFET fully on.
The simplest level translator is a one-transistor NOT gate (with a cheap nFET or npn), with its pull-up resistor to the “Vpp” high voltage.
I hope you can easily get the Vpp you need (8 V? 10 V?) from your power supply.
There are many other clever ways to generate (“bootstrap”) that “Vpp” voltage.
I realized the day after I ordered my boards that I should probably have used pFETs. I completely forgot about their lack of needing a higher voltage to turn “on” until I was doing some stuff in SPICE the other day, but I guess I will just deal with that problem once the boards get here. Your (a) option is easiest from a post-fabrication standpoint since I can just drop parts in hopefully.
As for rows not turning on I have realized that the problem is that I need a smaller resistor since current controlled devices vary the voltage to get the specified current. I still am not sure if running this short circuit will have an adverse effect, however, so it is still an option.
The actual power supply hasn’t been designed yet, so at the moment my bench supply will have to suffice until my power draw gets over 800mA.
I have learned to start a little file with every project: “Things that I would do differently if I ever do this project again”.
Little tweaks that are not really worth fabbing a fresh PCB — but if I were to fab a fresh PCB anyway for other reasons, I would go ahead and make those tweaks also.
I’ve seen lots of people end up with transistors in hand that had a slightly different pinout than what the guy who designed the board thought it would be.
They usually get 2 legs soldered down, then run a very short wire-wrap wire from the last leg to the other pad.
Or were you lucky enough to get pFETs that dropped right in?